Verification by error modeling : using testing techniques in hardware verification
By: Radecka, Katarzyna.
Contributor(s): Zilic, Zeljko.
Material type:
BookSeries: Frontiers In Electronics Testing / Edited By Vishwani D. Agrawal. Publisher: Boston Kluwer Academic Publishers 2003Description: xiv, 216p.ISBN: 9781402076527.Subject(s): Integrated circuits | Very Large Scale Integration | Computer Aided designDDC classification: 621.395 | R117v
| Item type | Current location | Collection | Call number | url | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|
Books
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PK Kelkar Library, IIT Kanpur | COMPACT STORAGE (BASEMENT) | 621.395 R117v (Browse shelf) | Book Request | Available | A174930 |
Total holds: 0
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