| 000 | 05549nam a22007931i 4500 | ||
|---|---|---|---|
| 001 | 8664506 | ||
| 003 | IEEE | ||
| 005 | 20200413152931.0 | ||
| 006 | m eo d | ||
| 007 | cr cn |||m|||a | ||
| 008 | 190402s2019 caua foab 000 0 eng d | ||
| 020 |
_a9781681735009 _qelectronic |
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| 020 |
_z9781681735016 _qhardcover |
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| 020 |
_z9781681734996 _qpaperback |
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| 024 | 7 |
_a10.2200/S00896ED1V01Y201901DTM058 _2doi |
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| 035 | _a(CaBNVSL)thg00978684 | ||
| 035 | _a(OCoLC)1091193905 | ||
| 040 |
_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL |
||
| 050 | 4 |
_aQA76.545 _b.S248 2019eb |
|
| 082 | 0 | 4 |
_a004/.33 _223 |
| 100 | 1 |
_aSadoghi, Mohammad, _eauthor. |
|
| 245 | 1 | 0 |
_aTransaction processing on modern hardware / _cMohammad Sadoghi, Spyros Blanas. |
| 264 | 1 |
_a[San Rafael, California] : _bMorgan & Claypool, _c[2019] |
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| 300 |
_a1 PDF (xv, 112 pages) : _billustrations (some color). |
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| 336 |
_atext _2rdacontent |
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| 337 |
_aelectronic _2isbdmedia |
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| 338 |
_aonline resource _2rdacarrier |
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| 490 | 1 |
_aSynthesis lectures on data management, _x 2153-5418 ; _v#58 |
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| 538 | _aMode of access: World Wide Web. | ||
| 538 | _aSystem requirements: Adobe Acrobat Reader. | ||
| 500 | _aPart of: Synthesis digital library of engineering and computer science. | ||
| 504 | _aIncludes bibliographical references (pages 105-119). | ||
| 505 | 0 | _a1. Introduction -- 1.1. The shifting hardware landscape -- 1.2. Book outline | |
| 505 | 8 | _a2. Transaction concepts -- 2.1. Overview -- 2.2. Acid properties -- 2.3. Concurrency control overview -- 2.4. Overview concurrency control protocols | |
| 505 | 8 | _a3. Multi-version concurrency revisited -- 3.1. Optimistic concurrency -- 3.2. Pessimistic concurrency -- 3.3. Time-based concurrency -- 3.4. Multi-version storage model | |
| 505 | 8 | _a4. Coordination-avoidance concurrency -- 4.1. Restrictive concurrency -- 4.2. Deterministic planning optimization | |
| 505 | 8 | _a5. Novel transactional system architectures -- 5.1. Hardware-aware concurrency -- 5.2. HTAP : hybrid transactional and analytical processing | |
| 505 | 8 | _a6. Hardware-assisted transactional utilities -- 6.1. Database partitioning -- 6.2. Database indexing | |
| 505 | 8 | _a7. Transactions on heterogeneous hardware -- 7.1. Hardware accelerators -- 7.2. RDMA : remote direct memory access | |
| 505 | 8 | _a8. Outlook : the era of hardware specialization and beyond -- 8.1. Scaling the network wall for distributed transaction processing -- 8.2. Near-data transaction processing -- 8.3. Blockchain : fault-tolerant distributed transactions. | |
| 506 | _aAbstract freely available; full-text restricted to subscribers or individual document purchasers. | ||
| 510 | 0 | _aCompendex | |
| 510 | 0 | _aINSPEC | |
| 510 | 0 | _aGoogle scholar | |
| 510 | 0 | _aGoogle book search | |
| 520 | 3 | _aThe last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause to fundamentally rethink the architecture of database systems. The data storage lexicon has now expanded beyond spinning disks and RAID levels to include the cache hierarchy, memory consistency models, cache coherence and write invalidation costs, NUMA regions, and coherence domains. New memory technologies promise fast non-volatile storage and expose unchartered trade-offs for transactional durability, such as exploiting byte-addressable hot and cold storage through persistent programming that promotes simpler recovery protocols. In the meantime, the plateauing single-threaded processor performance has brought massive concurrency within a single node, first in the form of multi-core, and now with many-core and heterogeneous processors. The exciting possibility to reshape the storage, transaction, logging, and recovery layers of next-generation systems on emerging hardware have prompted the database research community to vigorously debate the trade-offs between specialized kernels that narrowly focus on transaction processing performance vs. designs that permit transactionally consistent data accesses from decision support and analytical workloads. In this book, we aim to classify and distill the new body of work on transaction processing that has surfaced in the last decade to navigate researchers and practitioners through this intricate research subject. | |
| 530 | _aAlso available in print. | ||
| 588 | _aTitle from PDF title page (viewed on April 2, 2019). | ||
| 650 | 0 | _aTransaction systems (Computer systems) | |
| 653 | _atransaction processing | ||
| 653 | _aACID semantics | ||
| 653 | _aconsistency | ||
| 653 | _aisolation levels | ||
| 653 | _aconcurrency controls | ||
| 653 | _aoptimistic concurrency | ||
| 653 | _apessimistic concurrency | ||
| 653 | _amulti-version concurrency control | ||
| 653 | _ahardware-conscious concurrency | ||
| 653 | _aHTAP | ||
| 653 | _aindexing | ||
| 653 | _ahardware acceleration | ||
| 653 | _aRDMA | ||
| 700 | 1 |
_aBlanas, Spyros, _eauthor. |
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| 776 | 0 | 8 |
_iPrint version: _z9781681735016 _z9781681734996 |
| 830 | 0 | _aSynthesis digital library of engineering and computer science. | |
| 830 | 0 |
_aSynthesis lectures on data management ; _v#58. |
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| 856 | 4 | 2 |
_3Abstract with links to resource _uhttps://ieeexplore.ieee.org/servlet/opac?bknumber=8664506 |
| 856 | 4 | 0 |
_3Abstract with links to full text _uhttps://doi.org/10.2200/S00896ED1V01Y201901DTM058 |
| 999 |
_c562390 _d562390 |
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