000 00532nam a22001817a 4500
005 20170831121533.0
008 170831b xxu||||| |||| 00| 0 eng d
040 _cIITK
041 _aeng
082 _a621.395
_bC421u
100 _aCheng, Kwang-ting
245 _aUnified methods for VLSI simulation and test generation
_cKwang -Ting Cheng and Vishwani D. Agrawal
260 _aDordrecht
_bKluwer Academic Publishers
_c1989
300 _axii, 148p
650 _aVLSI -- Simulation
650 _aTest generation
942 _cBK
999 _c557905
_d557905