000 05677nam a22005175i 4500
001 978-1-4020-6433-3
003 DE-He213
005 20161121231154.0
007 cr nn 008mamaa
008 100301s2007 ne | s |||| 0|eng d
020 _a9781402064333
_9978-1-4020-6433-3
024 7 _a10.1007/978-1-4020-6433-3
_2doi
050 4 _aTK1-9971
072 7 _aTJK
_2bicssc
072 7 _aTEC041000
_2bisacsh
082 0 4 _a621.382
_223
100 1 _aMak, Pui-In.
_eauthor.
245 1 0 _aAnalog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers
_h[electronic resource] /
_cby Pui-In Mak, Seng-Pan U, Rui Paulo Martins.
264 1 _aDordrecht :
_bSpringer Netherlands,
_c2007.
300 _aXXII, 178 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aAnalog Circuits and Signal Processing
505 0 _aTransceiver Architecture Selection – Review, State-Of-The-Art Survey And Case Study -- Two-Step Channel Selection – A Technique For Multistandard Transceiver Front-Ends -- System Design Of A Sip Receiver For Ieee 802.11a/B/G Wlan -- Low-Voltage Analog-Baseband Techniques -- An Experimental 1-V Sip Receiver Analog-Baseband Ic For Ieee 802.11a/B/G Wlan -- Conclusions.
520 _aWith the past few decade efforts on lithography and integrated-circuit (IC) technologies, very low-cost microsystems have been successfully developed for many different applications. The trend in wireless communications is toward creating a networkubiquitous era in the years to come. Many unprecedented opportunities and challenges, such as Design for multi-standardability and low-voltage (LV) compliance, are rapidly becoming the mainstream directions in wireless-IC research and development, given that the former can offer the best connectivity among different networks, while the latter can facilitate the technology migration into the sub-1-V nanoscale regimes for further cost and power reduction. Analog-Baseband Architecturees and Circuits presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. The first part of the book reviews the physical layer specifications of modern wireless communication standards, presents the fundamental tradeoffs involved in transceiver architecture selection, and provides case studies of the state-of-the-art multistandard transceivers, where the key techniques reinforced are highlighted and discussed. A statistical summary (with 100+ references cited) of most used transmitter and receiver architectures for modern communication standards is provided. All the references are citied from the leading forums, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005. The second part focuses on the architectural design of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection technique is disclosed. It, through the reconfiguration of receiver and transmitter analog basebands, enables not only a relaxation of the RF frequency synthesizer’s and local oscillator’s design specifications, but also an efficient multistandard compliance by synthesizing the low-IF and zero-IF in the receiver; and the direct-up and two-step-up in the transmitter. The principle is demonstrated in few design examples. One of them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not only has the two-step channel selection embedded, but also features a flexible-IF topology, a unique 3D-stack floorplan, and a particular design methodology for high testability and routability. The third part deals with the circuit design. In addition to the methodical description of many LV circuit techniques, 3 tailormade LV-robust functional blocks are presented. They include: 1) a double-quadrature-downconversion filter (DQDF) – it realizes concurrently clock-rate-defined IF reception, I/Q demodulation, IF channel selection and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it offers a transient-free constant-bandwidth gain adjustment. 3) An inside-OpAmp dc-offset canceler – it saves the silicon area required for realizing a large time constant on chip while maximizing its highpass-pole switchability for fast dc-offset transient. The last part presents experimental results of the 3 tailor-made building blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS process. Previously untold on-/off-chip co-setup for both full-chip and building blocks measurements are described. Not only the building blocks have successfully extended the state-of-the-art boundary in terms of signal bandwidth and supply voltage, the analog-baseband IC has been so far the lowest-voltage-reported solution for IEEE 802.11a/b/g WLAN receivers.
650 0 _aEngineering.
650 0 _aMicrowaves.
650 0 _aOptical engineering.
650 0 _aElectrical engineering.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aCommunications Engineering, Networks.
650 2 4 _aCircuits and Systems.
650 2 4 _aMicrowaves, RF and Optical Engineering.
700 1 _aU, Seng-Pan.
_eauthor.
700 1 _aMartins, Rui Paulo.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781402064326
830 0 _aAnalog Circuits and Signal Processing
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4020-6433-3
912 _aZDB-2-ENG
950 _aEngineering (Springer-11647)
999 _c509631
_d509631