000 | 03118nam a22005295i 4500 | ||
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001 | 978-0-387-68953-1 | ||
003 | DE-He213 | ||
005 | 20161121231150.0 | ||
007 | cr nn 008mamaa | ||
008 | 100301s2007 xxu| s |||| 0|eng d | ||
020 |
_a9780387689531 _9978-0-387-68953-1 |
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024 | 7 |
_a10.1007/978-0-387-68953-1 _2doi |
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050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
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072 | 7 |
_aTEC008010 _2bisacsh |
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082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aChinnery, David. _eauthor. |
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245 | 1 | 0 |
_aClosing the Power Gap Between ASIC & Custom _h[electronic resource] : _bTools and Techniques for Low Power Design / _cby David Chinnery, Kurt Keutzer. |
264 | 1 |
_aBoston, MA : _bSpringer US, _c2007. |
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300 |
_aXII, 388 p. 138 illus. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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505 | 0 | _aOverview of the Factors Affecting the Power Consumption -- Pipelining to Reduce the Power -- Voltage Scaling -- Methodology to Optimize Energy of Computation for SOCs -- Linear Programming for Gate Sizing -- Linear Programming for Multi-Vth and Multi-Vdd Assignment -- Power Optimization using Multiple Supply Voltages -- Placement for Power Optimization -- Power Gating Design Automation -- Verification For Multiple Supply Voltage Designs -- Winning the Power Struggle in an Uncertain Era -- Pushing ASIC Performance in a Power Envelope -- Low Power ARM 1136JF-S Design. | |
520 | _aThis book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: - Microarchitectural techniques to reduce energy per operation - Power reduction with timing slack from pipelining - Analysis of the benefits of using multiple supply and threshold voltages - Placement techniques for multiple supply voltages - Verification for multiple voltage domains - Improved algorithms for gate sizing, and assignment of supply and threshold voltages - Power gating design automation to reduce leakage - Relationships among statistical timing, power analysis, and parametric yield optimization Design examples illustrate that these techniques can improve energy efficiency by two to three times. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aComputer hardware. | |
650 | 0 | _aComputer-aided engineering. | |
650 | 0 | _aElectrical engineering. | |
650 | 0 | _aElectronics. | |
650 | 0 | _aMicroelectronics. | |
650 | 0 | _aElectronic circuits. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aComputer-Aided Engineering (CAD, CAE) and Design. |
650 | 2 | 4 | _aComputer Hardware. |
650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
650 | 2 | 4 | _aElectrical Engineering. |
700 | 1 |
_aKeutzer, Kurt. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9780387257631 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-0-387-68953-1 |
912 | _aZDB-2-ENG | ||
950 | _aEngineering (Springer-11647) | ||
999 |
_c509530 _d509530 |