000			03801nam a22005415i 4500
001			978-0-387-28487-3
003			DE-He213
005			20161121231107.0
007			cr nn 008mamaa
008			100301s2006 xxu| s |||| 0|eng d
020			_a9780387284873 _9978-0-387-28487-3
024	7		_a10.1007/0-387-28487-7 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
245	1	0	_aFPGA Implementations of Neural Networks _h[electronic resource] / _cedited by Amos R. Omondi, Jagath C. Rajapakse.
264		1	_aBoston, MA : _bSpringer US, _c2006.
300			_aXII, 360 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aFPGA Neurocomputers -- On the Arithmetic Precision for Implementing Back-Propagation Networks on FPGA: A Case Study -- FPNA: Concepts and Properties -- FPNA: Applications and Implementations -- Back-Propagation Algorithm Achieving 5 Gops on the Virtex-E -- FPGA Implementation of Very Large Associative Memories -- FPGA Implementations of Neocognitrons -- Self Organizing Feature Map for Color Quantization on FPGA -- Implementation of Self-Organizing Feature Maps in Reconfigurable Hardware -- FPGA Implementation of a Fully and Partially Connected MLP -- FPGA Implementation of Non-Linear Predictors -- The REMAP Reconfigurable Architecture: A Retrospective.
520			_aDuring the 1980s and early 1990s there was signi?cant work in the design and implementation of hardware neurocomputers. Nevertheless, most of these efforts may be judged to have been unsuccessful: at no time have have ha- ware neurocomputers been in wide use. This lack of success may be largely attributed to the fact that earlier work was almost entirely aimed at developing custom neurocomputers, based on ASIC technology, but for such niche - eas this technology was never suf?ciently developed or competitive enough to justify large-scale adoption. On the other hand, gate-arrays of the period m- tioned were never large enough nor fast enough for serious arti?cial-neur- network (ANN) applications. But technology has now improved: the capacity and performance of current FPGAs are such that they present a much more realistic alternative. Consequently neurocomputers based on FPGAs are now a much more practical proposition than they have been in the past. This book summarizes some work towards this goal and consists of 12 papers that were selected, after review, from a number of submissions. The book is nominally divided into three parts: Chapters 1 through 4 deal with foundational issues; Chapters 5 through 11 deal with a variety of implementations; and Chapter 12 looks at the lessons learned from a large-scale project and also reconsiders design issues in light of current and future technology.
650		0	_aEngineering.
650		0	_aComputer science.
650		0	_aMicroprocessors.
650		0	_aSpecial purpose computers.
650		0	_aEngineering design.
650		0	_aElectrical engineering.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aComputer Science, general.
650	2	4	_aEngineering Design.
650	2	4	_aSpecial Purpose and Application-Based Systems.
650	2	4	_aElectrical Engineering.
650	2	4	_aProcessor Architectures.
700	1		_aOmondi, Amos R. _eeditor.
700	1		_aRajapakse, Jagath C. _eeditor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9780387284859
856	4	0	_uhttp://dx.doi.org/10.1007/0-387-28487-7
912			_aZDB-2-ENG
950			_aEngineering (Springer-11647)
999			_c508479 _d508479