000 | 05072nam a22005655i 4500 | ||
---|---|---|---|
001 | 978-0-387-28327-2 | ||
003 | DE-He213 | ||
005 | 20161121231013.0 | ||
007 | cr nn 008mamaa | ||
008 | 100301s2005 xxu| s |||| 0|eng d | ||
020 |
_a9780387283272 _9978-0-387-28327-2 |
||
024 | 7 |
_a10.1007/0-387-28327-7 _2doi |
|
050 | 4 | _aTJ212-225 | |
072 | 7 |
_aTJFM _2bicssc |
|
072 | 7 |
_aTEC004000 _2bisacsh |
|
082 | 0 | 4 |
_a629.8 _223 |
100 | 1 |
_aAdamski, Marian Andrzej. _eauthor. |
|
245 | 1 | 0 |
_aDesign of Embedded Control Systems _h[electronic resource] / _cby Marian Andrzej Adamski, Andrei Karatkevich, Marek Wegrzyn. |
264 | 1 |
_aBoston, MA : _bSpringer US, _c2005. |
|
300 |
_aXI, 267 p. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
505 | 0 | _aSpecification of Concurrent Embedded Control Systems -- Using Sequents for Description of Concurrent Digital Systems Behavior -- Formal Logic Design of Reprogrammable Controllers -- Hierarchical Petri Nets for Digital Controller Design -- Analysis and Verification of Discrete-Event Systems -- WCET Prediction for Embedded Processors Using an ADL -- Verification of Control Paths Using Petri Nets -- Memory-Saving Analysis of Petri Nets -- Symbolic State Exploration of UML Statecharts for Hardware Description -- Calculating State Spaces of Hierarchical Petri Nets Using BDD -- A New Approach to Simulation of Concurrent Controllers -- Synthesis of Concurrent Embedded Control Systems -- Optimal State Assignment of Synchronous Parallel Automata -- Optimal State Assignment of Asynchronous Parallel Automata -- Design of Embedded Control Systems Using Hybrid Petri Nets -- Implementation of Discrete-Event Systems in Programmable Logic -- Structuring Mechanisms in Petri Net Models -- Implementing a Petri Net Specification in a FPGA Using VHDL -- Finite State Machine Implementation in FPGAs -- Block Synthesis of Combinational Circuits -- The Influence of Functional Decomposition on Modern Digital Design Process -- System Engineering for Embedded Systems -- Development of Embedded Systems Using Oort -- Optimizing Communication Architectures for Parallel Embedded Systems -- Remarks on Parallel Bit-Byte CPU Structures of the Programmable Logic Controller -- FPGA Implementation of Positional Filters -- A Methodology for Developing IP Cores that Replace Obsolete ICS. | |
520 | _aA set of original results in the ?eld of high-level design of logical control devices and systems is presented in this book. These concern different aspects of such important and long-term design problems, including the following, which seem to be the main ones. First, the behavior of a device under design must be described properly, and some adequate formal language should be chosen for that. Second, effective algorithmsshouldbeusedforcheckingtheprepareddescriptionforcorrectness, foritssyntacticandsemanticveri?cationattheinitialbehaviorlevel.Third,the problem of logic circuit implementation must be solved using some concrete technological base; ef?cient methods of logic synthesis, test, and veri?cation should be developed for that. Fourth, the task of the communication between the control device and controlled objects (and maybe between different control devices)waitsforitssolution.Alltheseproblemsarehardenoughandcannotbe successfully solved without ef?cient methods and algorithms oriented toward computer implementation. Some of these are described in this book. The languages used for behavior description have been descended usually from two well-known abstract models which became classic: Petri nets and ?nite state machines (FSMs). Anyhow, more detailed versions are developed and described in the book, which enable to give more complete information concerningspeci?cqualitiesoftheregardedsystems.Forexample,themodelof parallelautomatonispresented,whichunliketheconventional?niteautomaton can be placed simultaneously into several places, calledpartial. As a base for circuit implementation of control algorithms, FPGA is accepted in majority of cases. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aMicroprogramming. | |
650 | 0 | _aMicroprocessors. | |
650 | 0 | _aComputer-aided engineering. | |
650 | 0 | _aControl engineering. | |
650 | 0 | _aRobotics. | |
650 | 0 | _aMechatronics. | |
650 | 0 | _aElectrical engineering. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aControl. |
650 | 2 | 4 | _aElectrical Engineering. |
650 | 2 | 4 | _aComputer-Aided Engineering (CAD, CAE) and Design. |
650 | 2 | 4 | _aControl, Robotics, Mechatronics. |
650 | 2 | 4 | _aControl Structures and Microprogramming. |
650 | 2 | 4 | _aProcessor Architectures. |
700 | 1 |
_aKaratkevich, Andrei. _eauthor. |
|
700 | 1 |
_aWegrzyn, Marek. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9780387236308 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/0-387-28327-7 |
912 | _aZDB-2-ENG | ||
950 | _aEngineering (Springer-11647) | ||
999 |
_c507147 _d507147 |