000 04582nam a22005055i 4500
001 978-0-387-27446-1
003 DE-He213
005 20161121230516.0
007 cr nn 008mamaa
008 100301s2005 xxu| s |||| 0|eng d
020 _a9780387274461
_9978-0-387-27446-1
024 7 _a10.1007/b139084
_2doi
050 4 _aTK7895.M5
072 7 _aUYF
_2bicssc
072 7 _aCOM011000
_2bisacsh
082 0 4 _a004.1
_223
100 1 _aDandamudi, Sivarama P.
_eauthor.
245 1 0 _aGuide to RISC Processors
_h[electronic resource] :
_bfor Programmers and Engineers /
_cby Sivarama P. Dandamudi.
264 1 _aNew York, NY :
_bSpringer New York,
_c2005.
300 _aXVI, 388 p. 80 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aOverview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations.
520 _aRecently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here. Features: *Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience *Presents material in a manner suitable for flexible self-study • Assembly language programs permit reader executables using the SPIM simulator • Integrates core concepts to processor designs and their implementations • Supplies extensive and complete programming examples and figures • Contains chapter-by-chapter overviews and summaries * Provides source code for the MIPS language at the book’s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource. Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. Key Topics * Processor design issues * Evolution of CISC and RISC processors * MIPS, SPARC, PowerPC, Itanium, and ARM architectures * MIPS assembly language * SPIM simulator and debugger * Conditional execution * Floating-point and logical and shift operations * Number systems Computer Architecture/Programming Beginning/Intermediate Level.
650 0 _aComputer science.
650 0 _aMicroprogramming.
650 0 _aComputer organization.
650 0 _aMicroprocessors.
650 0 _aSoftware engineering.
650 0 _aComputer programming.
650 1 4 _aComputer Science.
650 2 4 _aProcessor Architectures.
650 2 4 _aControl Structures and Microprogramming.
650 2 4 _aSoftware Engineering/Programming and Operating Systems.
650 2 4 _aComputer Systems Organization and Communication Networks.
650 2 4 _aProgramming Techniques.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387210179
856 4 0 _uhttp://dx.doi.org/10.1007/b139084
912 _aZDB-2-SCS
950 _aComputer Science (Springer-11645)
999 _c499835
_d499835