| 000 | 00712pam a2200241a 44500 | ||
|---|---|---|---|
| 003 | OSt | ||
| 005 | 20231227094715.0 | ||
| 008 | 160408b2015 xxu||||| |||| 00| 0 eng d | ||
| 020 | _a9780124200319 | ||
| 040 | _cIIT Kanpur | ||
| 041 | _aeng | ||
| 082 |
_a621.3815284 _bF494 |
||
| 245 | 0 |
_aFinFet modeling for IC simulation and design _busing the BSIM-CMG standard _cYogesh Singh Chauhan ...[et al.] |
|
| 260 |
_aAmsterdam _bElsevier _c2015 |
||
| 300 | _axi, 292p | ||
| 650 | _aIntegrated circuits -- Computer simulation | ||
| 700 | _aChauhan, Yogesh Singh | ||
| 700 | _aLu, Darsen D. | ||
| 700 | _aVanugopalan, Sriramkumar | ||
| 700 | _aDuarte, Juan Pablo | ||
| 700 | _aPaydavosi, Navid | ||
| 942 | _cBK | ||
| 999 |
_c377157 _d377157 |
||