000 00543pam a2200169a 44500
008 160408b2011 xxu||||| |||| 00| 0 eng d
020 _a9781441992956
040 _aIIT, Kanpur
082 _a621.395
_bC476p
100 _aChuriwala, Sanjay
245 1 _aPrinciples of VLSI RTL design
_ba practical guide
_cSanjay Churiwala and Sapan Garg; forewarded by Mike Gianfagna
260 _aNew York
_bSpringer
_c2011
300 _axv, 182p
650 _aCircuit design
700 _aGarg, Sapan
997 _aA173725 C
999 _c370722
_d370722