000 00615pam a2200205a 44500
008 160408b2006 xxu||||| |||| 00| 0 eng d
020 _a0387333991
082 _a621.392
_bSU84S2
100 _aSutherland,Stuart,Davidmann,Simon
245 1 _aSYSTEMVERILOG FOR DESIGN
_cA GUIDE TO USING SYSTEMVERILOG FOR HARDWARE DESIGN AND MODELING
250 _a2nd
260 _a
_bSpringer Science+Business Media Inc., New York
_c2006
300 _axxx,418
650 _aSystem Verilog
650 _aHardware Design
650 _aHardware Modeling
700 _aFlake,Peter
964 _gCIRC
997 _aA159501 C
999 _c357704
_d357704