000 00551pam a2200193a 44500
005 20170320151613.0
008 160408b2000 xxu||||| |||| 00| 0 eng d
020 _a354064976X
040 _cIITK
041 _aeng
082 _a004.22
_bAR25
245 1 _aARCHITECTURE DESIGN AND VALIDATION METHODS
260 _bSpringer-Verlag, Berlin
_c2000
300 _aviii,357
650 _aComputer Architecture
650 _aIntegrated Circuits -- Very Large Scale Integration -- Design And Construction
700 _aBorger,Egon ed.
942 _cBK
999 _c337176
_d337176