Computer architecture techniques for power-efficiency
By: Kaxiras, Stefanos.
Contributor(s): Martonosi, Margaret.
Material type:
BookSeries: Synthesis lectures on computer architecture: #4.Publisher: San Rafael, Calif (1537 Fourth Street, San Rafael, CA 94901 USA) : Morgan & Claypool Publishers, 2008Edition: 1st ed.Description: 1 electronic text (xi, 207 p. : ill.) : digital file.ISBN: 9781598292091 (electronic bk.); 9781598292084 (pbk.).Uniform titles: Synthesis digital library of engineering and computer science. Subject(s): Computer architecture | Mechanical efficiency | Chip multiprocessors (CMPs) | Computer power consumption | Computer energy consumption | Low power computer design | Computer power efficiency | Dynamic power | Static power | Leakage power | Dynamic voltage/frequency scaling | Computer architectureDDC classification: 004.22 Online resources: Abstract with links to resource Also available in print.| Item type | Current location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|
E books
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PK Kelkar Library, IIT Kanpur | Available | EBKE135 |
Mode of access: World Wide Web.
System requirements: Adobe Acrobat Reader.
Part of: Synthesis digital library of engineering and computer science.
Series from website.
Includes bibliographical references (p. 189-207).
Introduction -- Modeling, simulation, and measurement -- Using voltage and frequency adjustments to manage dynamic power -- Optimizing capacitance and switching activity to reduce dynamic power -- Managing static (leakage) power -- Conclusions.
Abstract freely available; full-text restricted to subscribers or individual document purchasers.
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In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase.
Also available in print.
Title from PDF t.p. (viewed on Nov. 7, 2008).
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