DIGITAL DESIGN WITH VERILOG HDL
By: Sternheim, Eliezer.
Contributor(s): Trivedi, Yatin.
Material type:![materialTypeLabel](/opac-tmpl/lib/famfamfam/BK.png)
Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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PK Kelkar Library, IIT Kanpur | General Stacks | 003 St45d (Browse shelf) | Available | A112998 |
Total holds: 0
Formerly Titled : Hardware Modeling With Verilog Hdl
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