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Closing the Power Gap Between ASIC & Custom : Tools and Techniques for Low Power Design /

By: Chinnery, David [author.].
Contributor(s): Keutzer, Kurt [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: Boston, MA : Springer US, 2007.Description: XII, 388 p. 138 illus. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9780387689531.Subject(s): Engineering | Computer hardware | Computer-aided engineering | Electrical engineering | Electronics | Microelectronics | Electronic circuits | Engineering | Circuits and Systems | Computer-Aided Engineering (CAD, CAE) and Design | Computer Hardware | Electronics and Microelectronics, Instrumentation | Electrical EngineeringDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Overview of the Factors Affecting the Power Consumption -- Pipelining to Reduce the Power -- Voltage Scaling -- Methodology to Optimize Energy of Computation for SOCs -- Linear Programming for Gate Sizing -- Linear Programming for Multi-Vth and Multi-Vdd Assignment -- Power Optimization using Multiple Supply Voltages -- Placement for Power Optimization -- Power Gating Design Automation -- Verification For Multiple Supply Voltage Designs -- Winning the Power Struggle in an Uncertain Era -- Pushing ASIC Performance in a Power Envelope -- Low Power ARM 1136JF-S Design.
In: Springer eBooksSummary: This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: - Microarchitectural techniques to reduce energy per operation - Power reduction with timing slack from pipelining - Analysis of the benefits of using multiple supply and threshold voltages - Placement techniques for multiple supply voltages - Verification for multiple voltage domains - Improved algorithms for gate sizing, and assignment of supply and threshold voltages - Power gating design automation to reduce leakage - Relationships among statistical timing, power analysis, and parametric yield optimization Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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Item type Current location Call number Status Date due Barcode Item holds
E books E books PK Kelkar Library, IIT Kanpur
Available EBK9817
Total holds: 0

Overview of the Factors Affecting the Power Consumption -- Pipelining to Reduce the Power -- Voltage Scaling -- Methodology to Optimize Energy of Computation for SOCs -- Linear Programming for Gate Sizing -- Linear Programming for Multi-Vth and Multi-Vdd Assignment -- Power Optimization using Multiple Supply Voltages -- Placement for Power Optimization -- Power Gating Design Automation -- Verification For Multiple Supply Voltage Designs -- Winning the Power Struggle in an Uncertain Era -- Pushing ASIC Performance in a Power Envelope -- Low Power ARM 1136JF-S Design.

This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: - Microarchitectural techniques to reduce energy per operation - Power reduction with timing slack from pipelining - Analysis of the benefits of using multiple supply and threshold voltages - Placement techniques for multiple supply voltages - Verification for multiple voltage domains - Improved algorithms for gate sizing, and assignment of supply and threshold voltages - Power gating design automation to reduce leakage - Relationships among statistical timing, power analysis, and parametric yield optimization Design examples illustrate that these techniques can improve energy efficiency by two to three times.

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