Computer architecture : a quantitative approach [6th ed.]
By: Hennessy, John L.
Contributor(s): Patterson, David A.
Publisher: Amsterdam Elsevier 2019Edition: 6th ed.Description: xxix, 902p.ISBN: 9789351073659.Subject(s): Computer architecture | Electronic digital computers -- Design and construction | Computer arithmetic | Computer engineering | Computer input-output equipmentDDC classification: 004.22 | H392c6 Summary: Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC| Item type | Current location | Collection | Call number | Copy number | Status | Date due | Barcode | Item holds |
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Text Books
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PK Kelkar Library, IIT Kanpur | TEXT | 004.22 H392c6 cop.1 (Browse shelf) | Copy 1 | Available | A185807 | ||
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Text Books
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PK Kelkar Library, IIT Kanpur | TEXT | 004.22 H392c6 cop.2 (Browse shelf) | Copy 2 | Available | A185808 | ||
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Text Books
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PK Kelkar Library, IIT Kanpur | TEXT | 004.22 H392c6 cop.3 (Browse shelf) | Copy 3 | Available | A185809 |
Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC
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