Welcome to P K Kelkar Library, Online Public Access Catalogue (OPAC)

Normal view MARC view ISBD view

Digital Phase Lock Loops : Architectures and Applications /

By: Al-araji, Saleh R [author.].
Contributor(s): Hussain, Zahir M [author.] | Al-qutayri, Mahmoud A [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: Boston, MA : Springer US, 2006.Description: XVIII, 192 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9780387328645.Subject(s): Engineering | Electrical engineering | Electronics | Microelectronics | Electronic circuits | Engineering | Circuits and Systems | Electrical Engineering | Signal, Image and Speech Processing | Communications Engineering, Networks | Electronics and Microelectronics, InstrumentationDDC classification: 621.3815 Online resources: Click here to access online
Contents:
General Review of Phase-Locked Loops -- Digital Phase Lock Loops -- The Time-Delay Digital Tanlock Loops (TDTLs) -- Hilbert Transformer and Time-Delay -- The Time-delay Digital Tanlock Loop in Noise -- Architectures for Improved Performance -- FPGA Reconfigurable TDTL -- Selected Applications.
In: Springer eBooksSummary: Digital phase lock loops are critical components of many communication, signal processing and control systems. This exciting new book covers various types of digital phase lock loops. It presents a comprehensive coverage of a new class of digital phase lock loops called the time delay tanlock loop (TDTL). It also details a number of architectures that improve the performance of the TDTL through adaptive techniques that overcome the conflicting requirements of the locking rage and speed of acquisition. These requirements are of paramount importance in many applications including wireless communications, consumer electronics and others. Digital Phase Lock Loops then illustrates the process of converting the TDTL class of digital phase lock loops for implementation on an FPGA-based reconfigurable system. These devices are being utilized in software-defined radio, DSP-based designs and many other communication and electronic systems to implement complex high-speed algorithms. Their flexibility and reconfigurability facilitate rapid prototyping, on-the-fly upgradeability, and code reuse with minimum effort and complexity. The practical real-time results, of the various TDTL architectures, obtained from the reconfigurable implementations are compared with those obtained through simulations with MATLAB/Simulink. The material in this book will be valuable to researchers, graduate students, and practicing engineers.
    average rating: 0.0 (0 votes)
Item type Current location Call number Status Date due Barcode Item holds
E books E books PK Kelkar Library, IIT Kanpur
Available EBK8799
Total holds: 0

General Review of Phase-Locked Loops -- Digital Phase Lock Loops -- The Time-Delay Digital Tanlock Loops (TDTLs) -- Hilbert Transformer and Time-Delay -- The Time-delay Digital Tanlock Loop in Noise -- Architectures for Improved Performance -- FPGA Reconfigurable TDTL -- Selected Applications.

Digital phase lock loops are critical components of many communication, signal processing and control systems. This exciting new book covers various types of digital phase lock loops. It presents a comprehensive coverage of a new class of digital phase lock loops called the time delay tanlock loop (TDTL). It also details a number of architectures that improve the performance of the TDTL through adaptive techniques that overcome the conflicting requirements of the locking rage and speed of acquisition. These requirements are of paramount importance in many applications including wireless communications, consumer electronics and others. Digital Phase Lock Loops then illustrates the process of converting the TDTL class of digital phase lock loops for implementation on an FPGA-based reconfigurable system. These devices are being utilized in software-defined radio, DSP-based designs and many other communication and electronic systems to implement complex high-speed algorithms. Their flexibility and reconfigurability facilitate rapid prototyping, on-the-fly upgradeability, and code reuse with minimum effort and complexity. The practical real-time results, of the various TDTL architectures, obtained from the reconfigurable implementations are compared with those obtained through simulations with MATLAB/Simulink. The material in this book will be valuable to researchers, graduate students, and practicing engineers.

There are no comments for this item.

Log in to your account to post a comment.

Powered by Koha