System on chip test architectures : Nanometer design for testability
Contributor(s): Wang, Laung-Terng [ed.] | Stroud, Charles E. [ed.] | Touba, Nur A. [ed.].
Material type:
ArticleSeries: The Morgan Kaufmann series in systems on silicon / edited by Wayne Wolf. Publisher: Amsterdam Elsevier 2008Description: xix, 856p.ISBN: 9780123739735.Subject(s): System on a chip -- Testing | Integrated circuits -- Very large scale integration -- TestingDDC classification: 621.395 | Sy87
| Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
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PK Kelkar Library, IIT Kanpur | General Stacks | 621.395 Sy87 (Browse shelf) | Available | A161217 |
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| 621.395 SA75I AN INTRODUCTION TO VLSI PHYSICAL DESIGN | 621.395 Se23v VLSI PLACEMENT & GLOBAL ROUTING USING SIMULATED ANNEALING | 621.395 Si58f FPGA design | 621.395 Sy87 System on chip test architectures | 621.395 T194F FUNDAMENTALS OF MODERN VLSI DEVICES | 621.395 T194F FUNDAMENTALS OF MODERN VLSI DEVICES | 621.395 V19V VLSI DESIGN |
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