FSM-based digital design using Verilog HDL [Electronic resource]
By: Minns, Peter.
Contributor(s): Elliott, Ian.
Material type:![materialTypeLabel](/opac-tmpl/lib/famfamfam/VM.png)
Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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PK Kelkar Library, IIT Kanpur | CARS | A161919 GA3.1 (Browse shelf) | Reference | ER3847 |
Total holds: 0
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The Cd Contains An Evaluation Copy Of Verilogger Extreme From Synapticad And All Of Book Examples
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