CMOS SRAM circuit design and parametric test in nano-scaled technologies : process-aware SRAM design and test
By: Pavlov, Andrei.
Contributor(s): Sachdev, Manoj.
Material type:![materialTypeLabel](/opac-tmpl/lib/famfamfam/BK.png)
Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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PK Kelkar Library, IIT Kanpur | General Stacks | 621.38152 P289c (Browse shelf) | Available | A165755 |
Total holds: 0
Browsing PK Kelkar Library, IIT Kanpur Shelves , Collection code: General Stacks Close shelf browser
621.38152 Or8e The electrical characterization of semiconductors | 621.38152 P194 Optical processes in semiconductors | 621.38152 P275u UNDERSTANDING SEMICONDUCTOR DEVICES | 621.38152 P289c CMOS SRAM circuit design and parametric test in nano-scaled technologies | 621.38152 P566 Photonic crystals | 621.38152 P695 PLASMA DEPOSITION OF AMORPHOUS SILICON-BASED MATERIALS | 621.38152 P871 Power/HVMOS devices compact modeling |
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