REDUCED INSTRUCTION SET COMPUTER ARCHITECTURES FOR VLSI
By: Katevenis, Manolis G. H.
Material type:
BookSeries: Acm Doctoral Dissertation Award, 1984. Publisher: Cambridge Mit Pr. 1986Description: 215.Subject(s): Computer Architecture | Integrated Circuits -- Very Large Scale IntegrationDDC classification: 621.38195835 | K156r
| Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
Books
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PK Kelkar Library, IIT Kanpur | General Stacks | 621.38195835 K156r (Browse shelf) | Available | A98469 |
Total holds: 0
Browsing PK Kelkar Library, IIT Kanpur Shelves , Collection code: General Stacks Close shelf browser
| 621.3819582 L584L LOGIC DESIGN AND COMPUTER ORGANIZATION | 621.3819582 W672d DIGITAL TECHNOLOGY | 621.38195833 M519 MEMORY DESIGN | 621.38195835 K156r REDUCED INSTRUCTION SET COMPUTER ARCHITECTURES FOR VLSI | 621.38195835 L515d DIGITAL CIRCUITS AND LOGIC DESIGN | 621.38195835 L547 HANDBOOK OF LOGIC CIRCUITS | 621.38195835 M132L LOGIC DESIGN PRINCIPLES |
Originally Presented As Author'S Thesis (Ph.D.) University Of California, 1983
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