REDUCED INSTRUCTION SET COMPUTER ARCHITECTURES FOR VLSI
By: Katevenis, Manolis G. H.
Material type:![materialTypeLabel](/opac-tmpl/lib/famfamfam/BK.png)
Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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PK Kelkar Library, IIT Kanpur | General Stacks | 621.38195835 K156r (Browse shelf) | Available | A98469 |
Total holds: 0
Originally Presented As Author'S Thesis (Ph.D.) University Of California, 1983
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