Welcome to P K Kelkar Library, Online Public Access Catalogue (OPAC)

New prospects of integrating low substrate temperatures with scaling-sustained device architectural innovation / (Record no. 562188)

000 -LEADER
fixed length control field 07066nam a2200769 i 4500
001 - CONTROL NUMBER
control field 7416916
003 - CONTROL NUMBER IDENTIFIER
control field IEEE
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200413152920.0
006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS
fixed length control field m eo d
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr cn |||m|||a
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 160219s2016 cau foab 000 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781627058551
Qualifying information ebook
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
Canceled/invalid ISBN 9781627058544
Qualifying information print
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.2200/S00696ED1V01Y201601EET004
Source of number or code doi
035 ## - SYSTEM CONTROL NUMBER
System control number (CaBNVSL)swl00406217
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)940360713
040 ## - CATALOGING SOURCE
Original cataloging agency CaBNVSL
Language of cataloging eng
Description conventions rda
Transcribing agency CaBNVSL
Modifying agency CaBNVSL
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7874.75
Item number .A835 2016
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Ashraf, Nabil Shovon.,
Relator term author.
245 10 - TITLE STATEMENT
Title New prospects of integrating low substrate temperatures with scaling-sustained device architectural innovation /
Statement of responsibility, etc. Nabil Shovon Ashraf, Shawon Alam, and Mohaiminul Alam.
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture San Rafael, California (1537 Fourth Street, San Rafael, CA 94901 USA) :
Name of producer, publisher, distributor, manufacturer Morgan & Claypool,
Date of production, publication, distribution, manufacture, or copyright notice 2016.
300 ## - PHYSICAL DESCRIPTION
Extent 1 PDF (viii, 72 pages)
336 ## - CONTENT TYPE
Content type term text
Source rdacontent
337 ## - MEDIA TYPE
Media type term electronic
Source isbdmedia
338 ## - CARRIER TYPE
Carrier type term online resource
Source rdacarrier
490 1# - SERIES STATEMENT
Series statement Synthesis lectures on emerging engineering technologies,
International Standard Serial Number 2381-1439 ;
Volume/sequential designation # 4
538 ## - SYSTEM DETAILS NOTE
System details note Mode of access: World Wide Web.
538 ## - SYSTEM DETAILS NOTE
System details note System requirements: Adobe Acrobat Reader.
500 ## - GENERAL NOTE
General note Part of: Synthesis digital library of engineering and computer science.
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc. note Includes bibliographical references (pages 63-69).
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note 1. Review of research on scaled device architectures and importance of lower substrate temperature operation of n-MOSFETs -- 1.1 Introduction and scope of this e-book -- 1.2 Basic overview and operational salient features of n-channel MOSFET device transport -- 1.3 Review of challenges and bottlenecks experienced over sustained MOSFET device scaling -- 1.4 Device parameters critical for performance enhancement for generalized scaling and at the end of Moore's Law -- 1.5 Role of substrate temperature modeling and control --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 2. Step-by-step computation of threshold voltage as a function of substrate temperatures -- 2.1 Essential modeling equations for computation of threshold voltage of N-channel MOSFET as a function of substrate/lattice temperature --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 3.Simulation outcomes for profile of threshold voltage as a function of substrate temperature based on key device-centric parameters -- 3.1 Simulation outcomes of various n-MOSFET device parameters including threshold voltage as a function of temperature -- 3.2 Simulation outcome of intrinsic carrier concentration (ni ) as a function of substrate or lattice temperature -- 3.3 Simulation outcome of incomplete ionization of Dopants relevant for lower substrate temperature operation -- 3.4 Simulation outcome of Fermi energy level EF (eV) as a function of temperature -- 3.5 Temperature dependence of flat band voltage [phi]ms (V) -- 3.6 P-type substrate n-channel MOSFET bulk potential dependence on substrate/lattice temperature -- 3.7 Dependence of threshold voltage VT of n-channel MOSFET on substrate temperature for 1 micro channel length MOSFET -- 3.7.1 Modeling impact of incomplete ionization on threshold voltage at the freeze-out temperature region: a closer look -- 3.8 Threshold voltage dependence on substrate temperature for different substrate doping conditions for an n-channel MOSFET -- 3.9 Threshold voltage dependence on substrate temperature for different oxide thickness for an n-channel MOSFET -- 3.10 Threshold voltage dependence on substrate temperature for negative substrate bias for an n-channel MOSFET -- 3.11 Threshold voltage dependence on substrate temperature for positive substrate bias for an n-channel MOSFET --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 4. Scaling projection of long channel threshold voltage variability with substrate temperatures to scaled node -- 4.1 Modeling and simulation results for a long channel MOSFET as channel length is scaled further --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 5. Advantage of lower substrate temperature MOSFET operation to minimize short channel effects and enhance reliability -- 5.1 Low substrate temperature MOSFET modeling benefits in consideration of short channel effects --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 6. A prospective outlook on implementation methodology of regulating substrate temperatures on silicon die -- 6.1 A short outlook on implementation of low substrate temperature MOSFET modeling and control --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 7. Summary of research results -- 7.1 Summary of research outcomes --
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 8. Conclusion -- References -- Authors' biographies.
506 1# - RESTRICTIONS ON ACCESS NOTE
Terms governing access Abstract freely available; full-text restricted to subscribers or individual document purchasers.
510 0# - CITATION/REFERENCES NOTE
Name of source Compendex
510 0# - CITATION/REFERENCES NOTE
Name of source INSPEC
510 0# - CITATION/REFERENCES NOTE
Name of source Google scholar
510 0# - CITATION/REFERENCES NOTE
Name of source Google book search
520 3# - SUMMARY, ETC.
Summary, etc. In order to sustain Moore's Law-based device scaling, principal attention has focused on toward device architectural innovations for improved device performance as per ITRS projections for technology nodes up to 10 nm. Efficient integration of lower substrate temperatures (<300K) to these innovatively configured device structures can enable the industry professionals to keep up with Moore's Law-based scaling curve conforming with ITRS projection of device performance outcome values. In this prospective review E-book, the authors have systematically reviewed the research results based on scaled device architectures, identified key bottlenecks to sustained scaling-based performance, and through original device simulation outcomes of conventional long channel MOSFET extracted the variation profile of threshold voltage as a function of substrate temperature which will be instrumental in reducing subthreshold leakage current in the temperature range 100K-300K. An exploitation methodology to regulate the die temperature to enable the efficient performance of a high-density VLSI circuit is also documented in order to make the lower substrate temperature operation of VLSI circuits and systems on chip process compatible.
530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE
Additional physical form available note Also available in print.
588 ## - SOURCE OF DESCRIPTION NOTE
Source of description note Title from PDF title page (viewed on February 19, 2016).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Integrated circuits
General subdivision Very large scale integration.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Computer engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Low temperature engineering.
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term threshold voltage
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term substrate temperature
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Fermi potential
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term intrinsic carrier concentration
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term bulk potential
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term depletion charge
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term metal-to-semiconductor work function difference
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term flat-band voltage
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term subthreshold leakage current
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term thin-film microcoolers
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Alam, Shawon.,
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Alam, Mohaiminul.,
Relator term author.
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Relationship information Print version:
International Standard Book Number 9781627058544
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Synthesis digital library of engineering and computer science.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Synthesis lectures on emerging engineering technologies ;
Volume/sequential designation # 4.
International Standard Serial Number 2381-1439
856 42 - ELECTRONIC LOCATION AND ACCESS
Materials specified Abstract with links to resource
Uniform Resource Identifier http://ieeexplore.ieee.org/servlet/opac?bknumber=7416916
Holdings
Withdrawn status Lost status Damaged status Not for loan Permanent Location Current Location Date acquired Barcode Date last seen Price effective from Koha item type
        PK Kelkar Library, IIT Kanpur PK Kelkar Library, IIT Kanpur 2020-04-13 EBKE688 2020-04-13 2020-04-13 E books

Powered by Koha