| 000 -LEADER |
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| fixed length control field |
06034nam a2200733 i 4500 |
| 001 - CONTROL NUMBER |
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| control field |
6828870 |
| 003 - CONTROL NUMBER IDENTIFIER |
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| control field |
IEEE |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20200413152914.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS |
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| fixed length control field |
m eo d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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| fixed length control field |
cr cn |||m|||a |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
140620s2014 caua foab 000 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781608459537 |
| Qualifying information |
ebook |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| Canceled/invalid ISBN |
9781608459520 |
| Qualifying information |
paperback |
| 024 7# - OTHER STANDARD IDENTIFIER |
|---|
| Standard number or code |
10.2200/S00581ED1V01Y201405CAC028 |
| Source of number or code |
doi |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(CaBNVSL)swl00403529 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(OCoLC)881524638 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
CaBNVSL |
| Language of cataloging |
eng |
| Description conventions |
rda |
| Transcribing agency |
CaBNVSL |
| Modifying agency |
CaBNVSL |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
QA76.9.M45 |
| Item number |
F256 2014 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
005.43 |
| Edition number |
23 |
| 090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) |
|---|
| Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
|
| Local cutter number (OCLC) ; Book number/undivided call number, CALL (RLIN) |
MoCl |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Falsafi, Babak., |
| Relator term |
author. |
| 245 12 - TITLE STATEMENT |
|---|
| Title |
A primer on hardware prefetching / |
| Statement of responsibility, etc. |
Babak Falsafi, Thomas F. Wenisch. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
|---|
| Place of production, publication, distribution, manufacture |
San Rafael, California (1537 Fourth Street, San Rafael, CA 94901 USA) : |
| Name of producer, publisher, distributor, manufacturer |
Morgan & Claypool, |
| Date of production, publication, distribution, manufacture, or copyright notice |
2014. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
1 PDF (xiv, 53 pages) : |
| Other physical details |
illustrations. |
| 336 ## - CONTENT TYPE |
|---|
| Content type term |
text |
| Source |
rdacontent |
| 337 ## - MEDIA TYPE |
|---|
| Media type term |
electronic |
| Source |
isbdmedia |
| 338 ## - CARRIER TYPE |
|---|
| Carrier type term |
online resource |
| Source |
rdacarrier |
| 490 1# - SERIES STATEMENT |
|---|
| Series statement |
Synthesis lectures on computer architecture, |
| International Standard Serial Number |
1935-3243 ; |
| Volume/sequential designation |
# 28 |
| 538 ## - SYSTEM DETAILS NOTE |
|---|
| System details note |
Mode of access: World Wide Web. |
| 538 ## - SYSTEM DETAILS NOTE |
|---|
| System details note |
System requirements: Adobe Acrobat Reader. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Part of: Synthesis digital library of engineering and computer science. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Series from website. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc. note |
Includes bibliographical references (pages 41-52). |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
1. Introduction -- 1.1 The memory wall -- 1.2 Prefetching -- 1.2.1 Predicting addresses -- 1.2.2 Prefetch lookahead -- 1.2.3 Placing prefetched values -- |
| 505 8# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
2. Instruction prefetching -- 2.1 Next-line prefetching -- 2.2 Fetch-directed prefetching -- 2.3 Discontinuity prefetching -- 2.4 Prescient fetch -- 2.5 Temporal instruction fetch streaming -- 2.6 Return-address stack-directed instruction prefetching -- 2.7 Proactive instruction fetch -- |
| 505 8# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
3. Data prefetching -- 3.1 Stride and stream prefetchers for data -- 3.2 Address-correlating prefetchers -- 3.2.1 Jump pointers -- 3.2.2 Pair-wise correlation -- 3.2.3 Markov prefetcher -- 3.2.4 Improving lookahead via prefetch depth -- 3.2.5 Improving lookahead via dead block prediction -- 3.2.6 Addressing on-chip storage limitations -- 3.2.7 Global history buffer -- 3.2.8 Stream chaining -- 3.2.9 Temporal memory streaming -- 3.2.10 Irregular stream buffer -- 3.3 Spatially correlated prefetching -- 3.3.1 Delta-correlated lookup -- 3.3.2 Global history buffer PC-localized/delta-correlating (GHB PC/DC) -- 3.3.3 Code-correlated lookup -- 3.3.4 Spatial footprint prediction -- 3.3.5 Spatial pattern prediction -- 3.3.6 Stealth prefetching -- 3.3.7 Spatial memory streaming -- 3.3.8 Spatio-temporal memory streaming -- 3.4 Execution-based prefetching -- 3.4.1 Algorithm summarization -- 3.4.2 Helper-thread and helper-core approaches -- 3.4.3 Run-ahead execution -- 3.4.4 Context restoration -- 3.4.5 Computation spreading -- 3.5 Prefetch modulation and control -- 3.6 Software approaches -- |
| 505 8# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
4. Concluding remarks-- Bibliography -- Author biographies. |
| 506 1# - RESTRICTIONS ON ACCESS NOTE |
|---|
| Terms governing access |
Abstract freely available; full-text restricted to subscribers or individual document purchasers. |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
Compendex |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
INSPEC |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
Google scholar |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
Google book search |
| 520 3# - SUMMARY, ETC. |
|---|
| Summary, etc. |
Since the 1970's, microprocessor-based digital platforms have been riding Moore's law, allowing for doubling of density for the same area roughly every two years. However, whereas microprocessor fabrication has focused on increasing instruction execution rate, memory fabrication technologies have focused primarily on an increase in capacity with negligible increase in speed. This divergent trend in performance between the processors and memory has led to a phenomenon referred to as the "Memory Wall." To overcome the memory wall, designers have resorted to a hierarchy of cache memory levels, which rely on the principal of memory access locality to reduce the observed memory access time and the performance gap between processors and memory. Unfortunately, important workload classes exhibit adverse memory access patterns that baffle the simple policies built into modern cache hierarchies to move instructions and data across cache levels. As such, processors often spend much time idling upon a demand fetch of memory blocks that miss in higher cache levels. Prefetching--predicting future memory accesses and issuing requests for the corresponding memory blocks in advance of explicit accesses--is an effective approach to hide memory access latency. There have been a myriad of proposed prefetching techniques, and nearly every modern processor includes some hardware prefetching mechanisms targeting simple and regular memory access patterns. This primer offers an overview of the various classes of hardware prefetchers for instructions and data proposed in the research literature, and presents examples of techniques incorporated into modern microprocessors. |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE |
|---|
| Additional physical form available note |
Also available in print. |
| 588 ## - SOURCE OF DESCRIPTION NOTE |
|---|
| Source of description note |
Title from PDF title page (viewed on June 20, 2014). |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Memory management (Computer science) |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
hardware prefetching |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
next-line prefetching |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
branch-directed prefetching |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
discontinuity prefetching |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
stride prefetching |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
address-correlated prefetching |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
Markov prefetcher |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
global history buffer |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
temporal memory streaming |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
spatial memory streaming |
| 653 ## - INDEX TERM--UNCONTROLLED |
|---|
| Uncontrolled term |
execution-based prefetching |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Wenisch, Thomas F., |
| Relator term |
author. |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Relationship information |
Print version: |
| International Standard Book Number |
9781608459520 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Synthesis digital library of engineering and computer science. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Synthesis lectures in computer architecture ; |
| Volume/sequential designation |
# 28. |
| International Standard Serial Number |
1935-3243 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Abstract with links to resource |
| Uniform Resource Identifier |
http://ieeexplore.ieee.org/servlet/opac?bknumber=6828870 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Abstract with links to full text |
| Uniform Resource Identifier |
http://dx.doi.org/10.2200/S00581ED1V01Y201405CAC028 |
