| 000 -LEADER |
|---|
| fixed length control field |
05264nam a2200637 i 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
6813332 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
IEEE |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20200413152847.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS |
|---|
| fixed length control field |
m eo d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
|---|
| fixed length control field |
cr cn |||m|||a |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
081011s2006 caua foab 000 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
1598291351 (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781598291353 (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
1598291343 (pbk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781598291346 (pbk.) |
| 024 7# - OTHER STANDARD IDENTIFIER |
|---|
| Standard number or code |
10.2200/S00044ED1V01Y200609DCS005 |
| Source of number or code |
doi |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(CaBNVSL)gtp00531445 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(OCoLC)73795573 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
CaBNVSL |
| Transcribing agency |
CaBNVSL |
| Modifying agency |
CaBNVSL |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7874.7 |
| Item number |
.D284 2006 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815 |
| Edition number |
22 |
| 090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) |
|---|
| Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
|
| Local cutter number (OCLC) ; Book number/undivided call number, CALL (RLIN) |
MoCl |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Davis, Justin S., |
| Dates associated with a name |
1975- |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
High-speed digital system design |
| Medium |
[electronic resource] / |
| Statement of responsibility, etc. |
Justin Davis. |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
1st ed. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
San Rafael, Calif. (1537 Fourth Street, San Rafael, CA 94901 USA) : |
| Name of publisher, distributor, etc. |
Morgan & Claypool Publishers, |
| Date of publication, distribution, etc. |
c2006. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
1 electronic text (viii, 87 p. : ill.) : |
| Other physical details |
digital file. |
| 490 1# - SERIES STATEMENT |
|---|
| Series statement |
Synthesis lectures on digital circuits and systems, |
| International Standard Serial Number |
1932-3174 ; |
| Volume/sequential designation |
#5 |
| 538 ## - SYSTEM DETAILS NOTE |
|---|
| System details note |
Mode of access: World Wide Web. |
| 538 ## - SYSTEM DETAILS NOTE |
|---|
| System details note |
System requirements: Adobe Acrobat Reader. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Part of: Synthesis digital library of engineering and computer science. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Series from website. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc. note |
Includes bibliographical references. |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
1. PCB planning for high-speed systems -- 1.1. Learning objectives -- 1.2. Multilayered power distribution system -- Bypass capacitors -- Layout considerations for bypass capacitors -- 1.3. Layer stacking -- Layer basics -- Embedded PCB capacitance -- Layer order -- Stacking stripes -- 1.4. Vias -- Via models -- 2. Ideal transmission lines -- 2.1. Learning objectives -- 2.2. Characteristic impedance -- Measuring characteristic impedance -- Designing for characteristic impedance -- 2.3. Propagation velocity -- 2.4. Reflections -- Bounce diagrams -- 2.5. Impedance compensation -- Load termination -- Source termination -- Power consumption -- Capacitive termination -- Differential termination -- Capacitive and inductive compensation -- 3. Realistic transmission lines -- 3.1. Learning objectives -- 3.2. Telegrapher's equations -- 3.3. RC and LC regions -- Lumped-element region -- RC region -- LC region -- 3.4. Skin effect -- Surface roughness -- Proximity effect -- 3.5. Dielectric losses -- 3.6. Compensating techniques -- Transmitter pre-emphasis -- Receiver equalization -- 3.7. Routing signals through Vias -- 4. Signal quality degradation -- 4.1. Learning objectives -- 4.2. Crosstalk in lumped-element models -- 4.3. Near-end and far-end crosstalk -- 4.4. Crosstalk in Vias -- 4.5. Crosstalk in differential signals. |
| 506 1# - RESTRICTIONS ON ACCESS NOTE |
|---|
| Terms governing access |
Abstract freely available; full-text restricted to subscribers or individual document purchasers. |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
Compendex |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
INSPEC |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
Google scholar |
| 510 0# - CITATION/REFERENCES NOTE |
|---|
| Name of source |
Google book search |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
High-Speed Digital System Design bridges the gap from theory to implementation in the real world. Systems with clock speeds in low megahertz range qualify for high-speed. Proper design results in quality digital transmissions and lowers the chance for errors. This book is for computer and electrical engineers who may or may not have learned electromagnetic theory. The presentation style allows readers to quickly begin designing their own high-speed systems and diagnosing existing designs for errors. After studying this book, readers will be able to: Design the power distribution system for a printed circuit board to minimize noise; Plan the layers of a PCB for signals, power, and ground to maximize signal quality and minimize noise; Include test structures in the printed circuit board to easily diagnose manufacturing mistakes; Choose the best PCB design parameters such a trace width, height, and routed path to ensure the most stable characteristic impedance; Determine the correct termination to minimize reflections; Predict the delay caused by a given PCB trace; Minimize driver power consumption using AC terminations; Compensate for discontinuities along a PCB trace; Use pre-emphasis and equalization techniques to counteract lossy transmission lines; Determine the amount of crosstalk between two traces; Diagnose existing PCBs to determine the sources of errors. |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE |
|---|
| Additional physical form available note |
Also available in print. |
| 588 ## - SOURCE OF DESCRIPTION NOTE |
|---|
| Source of description note |
Title from PDF t.p. (viewed on October 11, 2008). |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Very high speed integrated circuits |
| General subdivision |
Design and construction. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Digital electronics |
| General subdivision |
Design and construction. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Printed circuits |
| General subdivision |
Design and construction. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Electronic digital computers |
| General subdivision |
Design and construction. |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
Digital design. |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
Computer engineering. |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
Circuits. |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
Printed circuit board. |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
High-speed. |
| 730 0# - ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Synthesis digital library of engineering and computer science. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Synthesis lectures on digital circuits and systems ; |
| Volume/sequential designation |
#5. |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Abstract with links to resource |
| Uniform Resource Identifier |
http://ieeexplore.ieee.org/servlet/opac?bknumber=6813332 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Abstract with links to full text |
| Uniform Resource Identifier |
http://dx.doi.org/10.2200/S00044ED1V01Y200609DCS005 |
