| 000 -LEADER |
|---|
| fixed length control field |
00532nam a22001817a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20170831121533.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
170831b xxu||||| |||| 00| 0 eng d |
| 040 ## - CATALOGING SOURCE |
|---|
| Transcribing agency |
IITK |
| 041 ## - LANGUAGE CODE |
|---|
| Language code of text/sound track or separate title |
eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.395 |
| Item number |
C421u |
| 100 ## - MAIN ENTRY--AUTHOR NAME |
|---|
| Personal name |
Cheng, Kwang-ting |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
Unified methods for VLSI simulation and test generation |
| Statement of responsibility, etc |
Kwang -Ting Cheng and Vishwani D. Agrawal |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication |
Dordrecht |
| Name of publisher |
Kluwer Academic Publishers |
| Year of publication |
1989 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Number of Pages |
xii, 148p |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
VLSI -- Simulation |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Test generation |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Books |
