000 -LEADER |
fixed length control field |
03542nam a22004815i 4500 |
001 - CONTROL NUMBER |
control field |
978-0-387-27038-8 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20161121231107.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
100301s2006 xxu| s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9780387270388 |
-- |
978-0-387-27038-8 |
024 7# - OTHER STANDARD IDENTIFIER |
Standard number or code |
10.1007/b138536 |
Source of number or code |
doi |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Spear, Chris. |
Relator term |
author. |
245 10 - TITLE STATEMENT |
Title |
Systemverilog for Verification |
Medium |
[electronic resource] : |
Remainder of title |
A Guide to Learning the Testbench Language Features / |
Statement of responsibility, etc. |
by Chris Spear. |
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
Place of production, publication, distribution, manufacture |
Boston, MA : |
Name of producer, publisher, distributor, manufacturer |
Springer US, |
Date of production, publication, distribution, manufacture, or copyright notice |
2006. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XXXIV, 302 p. |
Other physical details |
online resource. |
336 ## - CONTENT TYPE |
Content type term |
text |
Content type code |
txt |
Source |
rdacontent |
337 ## - MEDIA TYPE |
Media type term |
computer |
Media type code |
c |
Source |
rdamedia |
338 ## - CARRIER TYPE |
Carrier type term |
online resource |
Carrier type code |
cr |
Source |
rdacarrier |
347 ## - DIGITAL FILE CHARACTERISTICS |
File type |
text file |
Encoding format |
PDF |
Source |
rda |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Verification Guidelines -- Data Types -- Procedural Statements and Routines -- Basic OOP -- Connecting the Testbench and Design -- Randomization -- Threads and Interprocess Communication -- Advanced OOP and Guidelines -- Functional Coverage -- Advanced Interfaces. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
Become a SystemVerilog Expert! You can verify complex designs thoroughly and quickly if you start with the right tools. This book teaches you the SystemVerilog constructs for verification with over 300 examples. Learn proven techniques so you can build testbenches that automatically generate stimulus to catch those bugs. The SystemVerilog language contains hundreds of new features. This book shows you how to use the important ones to get your job done. You will learn how to use techniques such as * Interfaces and clocking blocks * Object oriented programming * Constrained random stimulus * Functional coverage * Logical assertions "SystemVerilog for Verification is a MUST prerequisite book for anyone involved in the creation of SystemVerilog testbenches, as standalone or in a framework like Synopsys VMM. I consider this work as a golden reference as it gets into the inner use of the language and provides excellent insights into practical coding styles. This book fills a needed void in explaining, in a very readable manner and with lots of examples and visuals, the key elements and applications of thelanguage for a verification methodology that supports constrained-random testing in a transaction-based methodology." Ben Cohen, Author/Consultant/Trainer, abv-sva.org http://abv-sva.org/ Chris Spear is a Verification Consultant for Synopsys, and has advised companies around the world on testbench methodology. He has trained hundreds of engineers on SystemVerilog's verification constructs. Chris is the author of the widely used File I/O PLI package for Verilog. Testbenches get more complex. You need this book to keep up! *** Includes over 300 examples *** Plus a foreword by Phil Moorby, creator of the Verilog language. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Computer hardware. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Computer-aided engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Electrical engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Electronic circuits. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Engineering. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Computer-Aided Engineering (CAD, CAE) and Design. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Computer Hardware. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Electrical Engineering. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9780387270364 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
http://dx.doi.org/10.1007/b138536 |
912 ## - |
-- |
ZDB-2-ENG |