000 -LEADER |
fixed length control field |
03186nam a22004695i 4500 |
001 - CONTROL NUMBER |
control field |
978-1-4020-8586-4 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20161121230536.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
100301s2008 ne | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9781402085864 |
-- |
978-1-4020-8586-4 |
024 7# - OTHER STANDARD IDENTIFIER |
Standard number or code |
10.1007/978-1-4020-8586-4 |
Source of number or code |
doi |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Boulé, Marc. |
Relator term |
author. |
245 10 - TITLE STATEMENT |
Title |
Generating Hardware Assertion Checkers |
Medium |
[electronic resource] : |
Remainder of title |
For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring / |
Statement of responsibility, etc. |
by Marc Boulé, Zeljko Zilic. |
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
Place of production, publication, distribution, manufacture |
Dordrecht : |
Name of producer, publisher, distributor, manufacturer |
Springer Netherlands, |
Date of production, publication, distribution, manufacture, or copyright notice |
2008. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XX, 280 p. |
Other physical details |
online resource. |
336 ## - CONTENT TYPE |
Content type term |
text |
Content type code |
txt |
Source |
rdacontent |
337 ## - MEDIA TYPE |
Media type term |
computer |
Media type code |
c |
Source |
rdamedia |
338 ## - CARRIER TYPE |
Carrier type term |
online resource |
Carrier type code |
cr |
Source |
rdacarrier |
347 ## - DIGITAL FILE CHARACTERISTICS |
File type |
text file |
Encoding format |
PDF |
Source |
rda |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Assertions and the Verification Landscape -- Basic Techniques Behind Assertion Checkers -- PSL and SVA Assertion Languages -- Automata for Assertion Checkers -- Construction of PSL Assertion Checkers -- Enhanced Features and Uses of PSL Checkers -- Evaluating and Verifying PSL Assertion Checkers -- Checkers for SystemVerilog Assertions -- Conclusions and Future Work. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
Assertion-based design is a powerful new paradigm that is facilitating quality improvement in electronic design. Assertions are statements used to describe properties of the design (I.e., design intent), that can be included to actively check correctness throughout the design cycle and even the lifecycle of the product. With the appearance of two new languages, PSL and SVA, assertions have already started to improve verification quality and productivity. This is the first book that presents an “under-the-hood” view of generating assertion checkers, and as such provides a unique and consistent perspective on employing assertions in major areas, such as: specification, verification, debugging, on-line monitoring and design quality improvement. The PSL and SVA languages are treated in a unified way, thereby facilitating better learning and usage of the modern assertion languages, with a focus on obtaining the highest performance from assertion checkers. The obtained checkers are thoroughly benchmarked and verified, while formal proofs using automated reasoning techniques are explained. Included are examples of practical circuits (PCI, AMBA, Wishbone-PIC, CPU Pipeline) and their assertion checker synthesis. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Programming languages (Electronic computers). |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Computers. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Electronic circuits. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Engineering. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Theory of Computation. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Programming Languages, Compilers, Interpreters. |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Zilic, Zeljko. |
Relator term |
author. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9781402085857 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
http://dx.doi.org/10.1007/978-1-4020-8586-4 |
912 ## - |
-- |
ZDB-2-ENG |